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Re: [BP] Informative Channel



sugawara,

     Good over all analysis, i will pick a few nits below, but i agree
with the general overall results.

     In answer to your question, yes.  If we want our silicon to work
at 10Gb/s over realistic backplanes, we will have to make our receivers
work at quite small levels, even with cross talk which will not be much
smaller.  This may mean a pre-amp, DC offset cancellation, etc.  Early
versions have high power requirements and command a premium price but
most likely, if KR is successful, competitive forces will bring these
down.

      Nits:

      1.  At the end of the channel the alternating 10 pattern will
          have its higher harmonics removed.  The harmonics actually
          reduce the p-p amplitude so the remaining sine wave will be
          about 2dB (4/pi) higher than you predict.
      2.  Rx equalization is likely to enhance the alternating 10
          pattern some.
      3.  At the Nyquist rate, 5.15625GHz the equation 69.2 is down
          26dB :-(.
      4.  Random data will not sustain an alternating 10 pattern very
          long, so there will be no spectral line to fall into a dip
          in the transfer characteristic.  The finite length of the
          alternating region should spread the spectrum enough to
          allow it to be spread across a region which includes both
          dips and peaks.
      5.  The compliance test channel defined in annex 72A will be
          chosen by the silicon vendor to make his silicon look as
          good as possible while still staying below the spec line.
          You should be able to avoid ISI loss worse than the value
          shown as "typical", i certainly intend to make my test
          channel as close to the spec limit as possible.

                    charles


-- 
|--------------------------------------------------------------------|
|       Charles Moore
|       Agilent Technologies
|       ASIC Products Division
|       charles_moore@agilent.com
|       (970) 288-4561
|--------------------------------------------------------------------|

> Hello, all,
> 
> As silicon designer point of view, RX input level is very sensitive
> issue. If it is too low, we have to install pre-amp, DC offset
> chancellor, etc. and they consume more power and silicon area.
> 
> 
> Let's try simplified consideration;
> ..01010101.. signal somewhere PRBS consists of 5GHz sine wave
> (and small 3rd harmonics...). Pre-emphasis should be set most strong
> level, the other word it should be full swing 1Vppd typ at TX side.
> 
> In a case of equation 69.2 per draft 0.91, -25.3dB at 5GHz,
> ..01010101.. signal of 1Vppd TX makes 54mVppd or 27mVpp single-ended.
> 
> However
> 1. TX minimum amplitude is spec'ed 0.8Vppd, so any RX should receive
>    the signal from the TX (effective -2dB).
> 2. Return loss max is 5dB at equation 72-2 per draft 0.91. The
>    mismatch makes 1~2dB signal level loss at each of TX-channel and
>    channel-RX. Let's assume total -3dB min.
> 3. Frequency ripple may be allowed -5dB min at 5GHz in the discussion
>    on Jun 1. 
> Assumption of above 3 effects are -10dB min !!
> Then the really worst case of eye height at RX input will be 18mVppd
> or 9mVpp single-ended by ..01010101.. signal !!
> It doesn't include crosstalks, noise and jitter.
> 
> Should RX designers really consider such small level ??
> 
> 
> Another values;
> Figure 72A-2 in draft 0.91 shows -28.86dB "typical" ISI loss at
> 5.156GHz. When we use the number, RX input will be 28.8mVppd or
> 14.4mVpp single-ended from 1Vppd TX.
> If we add above 3 effects, it will be 9.6mVppd or 4.8mVpp single-
> ended.
> If we consider maximum ISI loss rather than "typical", 
> Ooooom...
> 
> Anyway these kind of small values of RX input may be smaller than
> peaks of noise and crosstalk.
> 
> 
> M. Sugawara
> NEC Electronics America
> 
> 
> 
>