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Re: [BP] DC block capacitors in 10G NRZ channels

Hi Vicente,Steve,All,
I  have same concern about the AC coupling, according to the draft,  AC compactors does belong to RX, but doesn't clearly say, whether its in linecard or in IC chip, I do think these will cause problems while we design a system. if in linecard, the pad and vias will surely cause the impedance discontinuity, different processing in AC coupling area of PCB will have different effect on the channel performance. How well we will process the AC compactors area ? As a system designer, I don't know, because the spec of  backplane channel doesn't include this part.
In order to reduce the risk, I do agree Vicente that it's a better choice that place the AC coupling into the IC package.
Jia Gongxian
Huawei Technologies Co.,Ltd.

----- Original Message -----
Sent: Wednesday, May 31, 2006 11:02 PM
Subject: Re: [BP] DC block capacitors in 10G NRZ channels


            Hi Vicente, all:


            I share your concern.  I don't think that the draft standard correctly deals with

the topology that you describe.  I commented on this in an earlier draft of the standard.

I think we need to say what is meant by AC coupling by providing one or more

specifications that place some bounds on it.




            Steve A.



From: Mellitz, Richard []
Sent: Tuesday, May 30, 2006 8:53 PM
Subject: Re: [BP] DC block capacitors in 10G NRZ channels


Hi Vicente,


803.3ap really doesn’t say the caps are on the board. The cap is after TP4 and is the domain of the Rx. Yes it's a challenge for chip folks as they will need to tell there customers how to deal with this issue.


Rich Mellitz, Intel




-----Original Message-----
From: Cavanna, Vicente Vaca (Sr. ; ProCurve ASICs) [mailto:vicente.cavanna@HP.COM]
Sent: Tuesday, May 30, 2006 6:45 PM
Subject: [BP] DC block capacitors in 10G NRZ channels


Hello colleagues,


I would like to understand the perspective of the group with regards to

external DC block capacitors in 10Gbps channels such as the one being

designed by this group. My past experience indicates it will be

difficult to find DC block capacitors that are specified for operation

at 5GHz and beyond - at least capacitors that are priced reasonably such

that their cost is a small proportion of the link cost. In the farily

recent past I have had difficulty finding capacitors with low enough

ESRs even at 4Gbps operation.


Even if such a capacitor is found the transmission line discontinuities

(vias, pads etc) associated with such capacitors present a significant

degradation that would be nice to eliminate.


I will ask a secondary question.

Has it been considered to require the DC block capacitor to be internal?

Many SERDES vendors have DC blocks integrated within their receivers and

located downstream from the internal 50 ohm termination but upstream

from their receiver bias network (which has much larger impedance than

50 ohms). Such placement allows the capacitor to be much smaller in

value and thus integrateable and still allows the receiver to be biased

independently of the transmitter which I believe is the main purpose of

the DC block. Another benefit of the internal capacitor is that it will

not have the associated discontinuties that an external capacitor will



Thanks in anticipation of your reply.



Vicente Cavanna

HP ProCurve Networking