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[HSSG] HSSG 40GE/100GE 100m OM3 objectives

The HSSG has adopted 100m over OM3 MMF reach objectives for both 40GE and 100GE. These are anticipated to be supported with 4x10G and 10x10G parallel fiber approaches, and have been subject of a number of HSSG presentations, most recently for example ghiasi_01_1107 and cole_02_1107.


To date, these presentations have focused on the single channel aspects of the Nx10G MMF parallel approaches. This is not surprising since this aspect is well understood within the industry, and has been extensively studied during standards activities such as 10GBASE-SR or SFP+ MSA. Excellent tools exist, such as the IEEE 10GE modeling spread-sheet that given an agreement on assumptions, generate a link budget.


What has been missing is a similarly comprehensive treatment of the crosstalk effects. During question and answer exchanges, several HSSG speakers commented that their experience with higher speed multi-channel applications showed that cross-talk rather then channel loss/distortion is the dominant factor. So while the debate about the single channel 100m OM3 link budget has been entertaining, it is not where the challenge lies in moving forward on developing a standard for the 100m reach objectives.


A number of individuals asked me questions after the presentations as to what cross-talk data I was requesting in my presentation that will be required for the 40GE and 100GE MMF link budgets. Since we have extensive experience in the IEEE in developing standards for multi-lane copper based links such as for backplane or cable, we should look to these successful efforts to what is required to properly characterize the electrical portion of the MMF links. A common characteristic of these efforts has been the development of comprehensive multi-channel models and agreement on methodology.


The following areas will need to be quantified for cross-talk effects, ideally based both on analysis/simulation and measurements. Some maybe found to be insignificant contributors, but that will be decided on the basis of data rather then assumptions.


- Host ASIC TX Output (IC and package)

- Host PCB TX traces

- Host to Module TX connector pins

- Module TX traces

- Module Laser Driver Array (IC and package)

- VCSEL Array (die and flex)

- PIN Array (die and flex)

- TIA/LA or TIA/AGC Array (IC and package)

- Module RX traces

- Module RX connector pins

- Module RX PCB traces

- HOST ASIC RX Input (IC and package)


Contributions bringing in data on 4x10G and 10x10G cross-talk effects for the above will be very much appreciated.