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I looked at reference on page 8 Yagisawa-san's paper title "Compact 40-Gbit/s Electroabsorption Monolithically
Integrated DFB Laser (EML) Module with a Driver IC for Very Short Reach Application". The EML driver
IC is not described in this paper, but to drive an EML I expect the driver IC to be either in InP or SiGe.
Based on this driver data how did you arrive at the following statement on page 11 "40 Gb/s Driver Output Waveform In
65 nm Standard CMOS"? You are using InP or SiGe driver performance as proof that 40Gb/s is possible in
65 nm CMOS!
Matt Traverso wrote:
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