Comment Number Comment SuggestedRemedy CommentType Clause Subclause Page Line
1 Getting information regarding PSE pin out alternative is important info however the ability to change that alternative by the SET operation is not important and should be implementation specific or optional. Either change aPSEPowerPairs in table 33-4 page 18 line 38 to be optional or make the "SET" action in page 5 line 20 optional. T 30.9 30.9.5.1.5 20 5
2 Force power is a dangerous ability.
It allows bypass of detection and classification.
It allows remote control of this ability and potential damage to legacy devices.

I am aware of the importance of this function as the importance of many other test functions for test purposes however it can be done through proprietary implementation and should not be formal requirement in the state flow.
The state flow should describe normal operation and not test functions which can be many and may vary between vendors.
Remove this function/ability from the draft and update state diagrams accordingly or suggest a safe way to prevent the following:
1. Enabling this function by remote management
2. Allowing non-compliant PDs to receive power.
3. To be in Force power mode for unlimited time.
TR 33 33.2.3.4 41 27
3 Regarding variables in the state flow:
We need to specify that the variables and signals in the state flow are not to be tested unless they are specified in the management paragraph.
In addition only the "externally observable behavior of the PSE" as indicated in page 40 line 6 should be tested.
All these externally observable behaviour of the PSE are indicated in the text of draft 4.1
Add in page 41 line 55 the following:
"The variables used in the state diagram are not required to be tested unless they represent externally observable behavior of the PSE as defined in clause 33 or required to be reported according to paragraph 33.6."
TR 33 33.2.3.4

4 The branch starting at "DETECT-EVAL" block and ends at "POWER_DENIED" block should be conditioned with "signature=valid" as the other 3 branches coming Change lines 34-35 from:
"(pd_requested_power>pse_available_power)*!performs_classification"

to:
"(pd_requested_power>pse_available_power)*!performs_classification*signature=valid"
T 33 33.2.3.7 44 34
5 The state flow does not reflect the requirement that if the system is not using the classification function and yet detected a valid PD, it should supply power only if there is enough power.
pse_available_power can be defined by the system or user.
PD_requested_power can be defined by other means (user specific means) as described by paragraph 33.2.9.
1. page 44 line 20:
change from: "signature=valid*!performs_classification"
to: "signature=valid*!performs_classification*(pse_available_power>PD_requested_power)"

2. page 41 lines 45-50:
Change from:
"pse_available_power
This variable indicates the highest power PD Class that could be supported.
Values:0:Class 1
1:Class 2
2:Class 0,Class 3 and Class 4"
to:
"pse_available_power
This variable indicates the highest power PD Class that could be supported.
Values:0:Class 1
1:Class 2
2:Class 0,Class 3 and Class 4
3:User specific value for available power.
3. page 42 at line 54: Add the following text:
The user can assign the values to the variables pd_requested_power and mr_pd_class_detected without running do_classification function by using user specific power allocation algorithms as defined by paragraph 33.2.9"

TR 33 33.2.3.7 44 20
6 What is "UCT", the output of POWER_DENIED" block?
Please define "UCT".

T 33 33.2.3.7 44 41
7 There is an error in table 33-2.
The value in item 9 should be 130nf and not 120nf.
120nf should be the value in table 33-8.
Page 47 line 9: change from 120nf to 130nf
Page 60 line 19: change from 130nf to 120nf.
E 33 table 33-2 47 20
8 Update figure 33c.6 to reflect the changes done in page 52 lines 11-12.

Update figure 33c.6 to reflect the changes done in page 52 lines 11-12. E 33 figure 33c.6 104 25
9 The gray area between the class current has margin of less than 7% in some ranges.
It is needed to be confirmed by PD and PSE chip vendors that the current margins are good enugh.
Update tables 33-4, 33-11 to guarantee 7% margin mimimum at the gray area or confirm that the current margin is OK. The class current range is not required to be change and re-evaluate.
If changes has to be made, the following places in the draft has to be updated too:
update page 52 line 12 from 60ma to TBDmA.
update page 82 line 12 from 60ma to TBDmA.
update page 101 line 50 from 60ma to TBDmA.
We will discuss the details in the meeting.
T 33.3.4 table 33-11 61 38-48
10 Error in the drawing.
Should be 15V>Vz>20V.
Change from 10.1<Vz<15VShould be 15V>Vz>20V. E 33A figure 33A.6 95 32
11 Updated table 33c.1 titles to reflect table 33-1 titles. Updated table 33c.1 titles to reflect table 33-1 titles. E 33C TABLE 33C.1 97 20
12 During startup, the PSE has to meet Inrush for Tlim as indicated in the state flow however it is not clear at the text in paragraph 33.2.8.5 at part c) Change line 11 at part c) from:
"During startup,the PSE shall meet the minimum I Inrush requirement at all PI voltages above 30V."

to
"During startup,the PSE shall meet the minimum IInrush requirement for Tlim duration, at all PI voltages above 30V."
E 33 33.2.8.5 52 11
13 The constant ILIM may represents Iinrush as well. Change line 48 from:
"Output current at short circuit condition (see Table 33–5)"

to:
"Output current at short circuit condition or Iinrush, at startup condition see Table 33–5)"
T 33 33.2.3.3 40 48
14 pse_ready is not defined. Define pse_ready in the state flow page 44 line 11.
T 33 33.2.3.7 44 11
15 Some of the internal signals and variables are required to describe and maintain the "logic" flow of the events in the state flow.
Some of the variables required to be output to the management as info and some are internal signals to allow logic description.

In order to prevent and interpretation that all signals and variable are required to be observed externally it is suggested to add such guidance at the beginning of paragraph 33.2.3.
Compliance to the operation of the state diagram shall be done by measuring voltage, current and timing at the PI. T 33 33.2.3 40 10
17 In the state CLASSIFICATION_EVAL, we start tpdc_timer again, why? Clarify or delete "start tpdc_timer" from the state. TR 33 33.2.3.7 44 33
18 The logic behind the right branch from the POWER_ON state is not clear.
Why "tpmdo_timer_done+(pse_enable=force_power)".
It should be "tpmdo_timer_done" (regardless of the issue if force power is required or not. I have a comment dedicated for this issue as well)

Clarify or change to "tpmdo_timer_done"
S
TR 33 33.2.3.7 44 46
19 During normal power ON mode, there is a situation that the available power is reduced (battery operation or something else that may cause to a condition of pse_available_power<pd_requested_power. In this case we should turn off the power. Add additional branch to the state POWER_ON conditioned with:
pse_available_power<pd_requested _ower and connected to the IDLE state.

TR 33 33.2.3.7 44 45