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Re: power delivery question from Liaison report


1) What is magic about 8% (or +-4%)?

2) Connector unbalance is more constrained than you suggest. While Cat3
is spec'd at .4 dB insertion loss that is not a resistive loss. Even at
the extremes of  +/-5% wire resistance, the variation is less than hall
your supposition.

3) You are right, we may need to lower the available power is we look at
the worst case of everything.

Jack Andresen

Rick Brooks wrote:

> I was reading in the Draft Liaison report from ISO/IEC JTC 1/SC 25/WG
> 3 to IEEE802.3 on power feeding that was
> handed out at the July Plenary.
> IEEE802.3af had question 4: Info on parameter limits (voltage,
> current, power, source impedance, ...) for world wide standards.
> i.e. what are the restriction beyond SELV.
> The response back was 48 VDC max, 175 ma max per pin.
> My question is:
> Is the 48VDC output from the port really 48VDC max as the response to
> the question indicates?
> If so, my thoughts are the following:
> We would have to spec our power output at the PSE as 48 VDC + 0%, -
> 8%, or something like that,
> so that it never exceeds 48 VDC continuously.
> This will further limit the available load power;
> it would be less than the load power that was discussed at the last
> meeting namely 14.6 watts.
> So, in that case the PD must be designed to draw at most 350 ma, as we
> discussed.
> And the power delivered at 100 meter cable would then be:
> Pwr = [44.2 - (12.5 x 0.35)] 0.35 =  13.9 Watts. (where 44.2 VDC is
> the lowest output voltage to still be in spec)
> For long cable lengths, the current per pin will be balanced, and we
> don't exceed the 175 ma per pin.
> For short cable lengths, we probably need an additional power spec, so
> that neither RJ-45 pin exceeds 175 ma.
> Say that due to connector imbalance, one pin is 175 ma, and the other
> is 20% below that, or 140 ma, which is a total of 315 ma.
> Then the power for a short cable would be (at least) 13.9 watts (44.2
> * 0.315).
> This would say that the PD device should be designed not to draw more
> than 350 ma,
> and at the same time not to draw more than 13.9 watts.
> That way we never exceed 48 VDC nor 175 ma per pin on a continuous
> basis.
> This puts the burden on the PD end to meet these current and power
> requirements.
> The PSE end would have a max voltage of 48 VDC, but it's current limit
> would be set slightly higher than 350 ma
> by some appropriate margin.
> If, on the other hand, we put the burden at the PSE end, then the
> available power goes down even more, but that may be OK also.
> comments?