RE: Candidate Detection Tolerance Allocation and Test Limits
My preference would be the 5% detection tolerance, This eases the
requirements on the reference voltages (or reference currents) used by the
PSE during its detection process, while still allowing for some degree of PD
power-draw "enumeration" by resistor value.
On the second issue, I believe that power-draw enumeration is an issue
better handled in software than in hardware. I don't believe that it is
economical, in the final analysis, to use a 100Mb/s Ethernet port to
trickle-charge a 12V or 24V exit sign battery, and - just speculating - I
don't even know if that would comply with code. More importantly, some
devices may need to be given priority access to power (if the CEO wants to
plug his PDA onto the net, I don't want my .mp3 player telling him "no...").