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FW: dissipation in power switches

Nobody said that the PSE should turn-on all ports at the same time. I do not
think that the standard should deal with that, this could be left open for
the designer's creativity.
Regarding the location of the current limit - I think it should be on the
PSE side. This will be in one line with the request we heard more than once
from potential PD makers - to keep it simple and low cost.   


-----Original Message-----
From: Dave Dwelley [mailto:ddwelley@xxxxxxxxxx]
Sent: Wednesday, January 31, 2001 01:53
To: stds-802-3-pwrviamdi-detection@xxxxxxxxxxxxxxxxxx
Subject: dissipation in power switches

There is a fair amount of dissipation at startup, especially if the PD has
a big input cap (~1000uf). We can push it onto one end - I'd suggest the PD
end, since there might be many ports simultaneously powering up in the PSE
and it might start to glow...

I'd propose that the PSE ramp up the line fairly quickly - something slower
than 5V/us to keep the 1u max line capacitance from tripping the 500mA
limit, but not too much slower to minimize the time it has VI across it.
Let the PD limit the current into its own input cap to 500mA/100ms or 350mA
forever - this keeps the big watts in the PD. If the PD screws up and
doesn't limit inrush current, the PSE will over-current and trip off.

Dave Dwelley

At 10:24 AM 1/31/01 -0700, Dieter wrote:
>I've simulated the power start up scenario and found large power
>dissipation in
>the PSE and PD switches.  Can we discuss this via the reflector or via the
>to face?