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PSE vs. PD power dissipation again

Group -

In lieu of a dedicated power ad-hoc reflector, I'm posting this to the 
general list. Is there a power reflector in the works?

I'm assuming that we'd eventually like to integrate the power switches into 
a PSE chip, and that PSE designers will tend to want to service multiple 
channels with a single chip: 4, 8, or more. Also, I assume that we'd like 
to be able to power up many PDs simultaneously (when the wiring closet 
power comes back on after a California shutdown) - this isn't critical, but 
it's desirable.

To do this, we need a scheme that keeps the power dissipation out of the 
PSE end. Rick and Dieter have both shown that if the PD limits inrush 
current to some value lower than the PSE current limit (eg., 350mA for the 
PD, 500mA for the PSE), dissipation in the PSE is near zero. This one of 
several options allowed by the draft standard as it reads now - others 
share the dissipation between the two ends (the Avaya resistor divider/FET 
scheme), or put all the dissipation in the PSE (the UVLO/latch-on scheme 
that Micrel showed at the meeting).

If we allow any PD to push any dissipation back into the PSE, we force the 
PSE to be able to handle the worst case - all channels powering 
simultaneously, with all the power in the PSE. To do this, the PSE needs 
some accommodation: heat sinks, external FETs, sequential power up 
algorithms (which lengthen average detect time), or low current limits at 
startup. None of these are desirable.

There is the issue of line capacitance, which will put the PSE into its 
500mA limit briefly (<74us) - but this short time duration won't 
significantly heat the PSE. We could also see a short on the wire - in this 
case, the PSE could shut off quickly (<1ms) or incorporate foldback to 
limit dissipation, like Micrel showed.

I propose that we mandate that the PD limit the inrush current, say to 
350mA +/-50mA, and mandate that the PSE limit at say 500mA +/-50mA. By 
forcing the PD to do this, we allow a multi-channel PSE chip with FETs on 
board. Otherwise we can't do it.

This does make a bare-bones PD more complicated. In the short run, it 
probably requires a low-cost op amp and a sense resistor to implement - or 
a 150 ohm/~1W series resistor and a FET to short it out when the switcher 
input cap voltage approaches the line voltage. Going forward, the PD 
function (with power device, current limit, UVLO, the works) can be 
integrated - and since PDs generally don't need multiple channels, the 
power in the single switch is tolerable (as Dieter showed at the meeting). 
The "30 watt" PD would conceivably need a dual - we'll use a bigger package 
or some other trick to deal with the heat in that case.

How much is it worth to integrate a multi-channel PSE chip?

Dave Dwelley
Linear Technology