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RE: PSE vs. PD power dissipation again

Hi Rick
this is good, I am afraid of a reply here.
we minx it with marketing... got me sweating.
one disadvantage of the reflector for me has been not having the time to keep
up with all the input in one place to see who says what.

Don, can we change the format a bit, where  an Excel spreadsheet is used
to table opinions... (just an idea here) so we have all the 2cents in one place
for all to absorb...
Sorry but this is not the only thing that I do all day, and figured if some of
can use such an approach to come up to speed on the issues any process ideas?

At 07:31 AM 3/23/01 -0800, Rick Brooks wrote: 

> Dave, 
> that is a concise summary alright. 
> One more thing that we should try to consider is the overall market. 
> We should try to give the best tradeoffs to the center of mass of that
> market. 
> Let's try to make the center of mass better. 
> Otherwise, it is easy for each of us to try to make the spec favor our part
> of the market (PSE or PD). 
> Since I would do PSE's, say, I would favor lower PSE cost and higher port
> density, so option 1. 
> In a way, I hate to ask for marketing input here, but that might be the best
> way to help 
> to choose the best of the 2 options. 
> For example: 
> If we all think that the largest part of the market will be rather large PD's
> (maybe 8 to 12 watts) 
> that need a big input capacitors, then Option 2 might be the best. 
> If we all think that the PD designs will be all over the map in terms of
> power 
> and required DC/DC capacitance, then option 1 might be the best. 
> I'm talking here about numbers of units shipped, not just the fact that there
> will be 1W PD's and 12W PD's. 
> We should lower overall (relative) cost of the system: 
> # of PSE ports shipped 
> cost per PSE port 
> # of PD ports shipped 
> cost per PD port 
> thoughts? 
> - Rick 
> -----Original Message-----  From:   Dave Dwelley [SMTP:ddwelley@xxxxxxxxxx] 
> Sent:   Thursday, March 22, 2001 5:46 PM  To:    
> stds-802-3-pwrviamdi@xxxxxxxx  Subject:        RE: PSE vs. PD power
> dissipation again 
> At the risk of repeating some of this discussion, let me summarize the  PSE-PD
> dissipation issue as I see it. If I've made a mistake in any of the following
> points, please correct me! 
> We seem to be split into two camps: 
> Inrush limit by PD:  - No dissipation in PSE, which means we can integrate
> multiple switches  - Requires inrush circuit in PD = more $$ in PD (amount of
> $ subject to debate)  - Puts power dissipation in PD FET always = bigger PD
> FET  - Requires rapid overcurrent disconnect in PSE  - A PSE with this design
> cannot power up a PD with no inrush limit 
> Inrush limit by PSE:  - Requires big FETs in the PSE to survive 500mA/100ms
> wire short  - Can power any PD - with or without inrush protection  -
> Dissipation can be in PSE, PD, or shared  - Must allow extended over-current
> faults before turn-off - adds to PSE  dissipation  - Can power big PD cap
> faster (500mA vs 350) if the PSE is sized to  dissipate the additional power 
> We need to endorse only one of these two, since they have mutually  exclusive
> features. 
> Option 1 really only has one compelling feature, which is low watts in the 
> PSE. We can integrate multiple option 1s in one chip. Multiple option 2s
> can't be integrated without some accommodation - sequential turn on,
> dynamically controlled current limit - something. There are secondary
> benefits to option 1 - it won't power up non-inrush-controlled PDs, which
> almost gets us the "second check" that Roger has been asking for, and it
> won't put a heavy load on a power-managed PSE for long durations during a
> wire short. 
> Option 2 has some nice features, most notably the ability to power up  nearly
> any PD. It can also ride out a brief short on the wire without disconnecting
> the PD. A minor downside is that the PSE power supply must absorb a
> fair-sized overload if a PD classified as a low power device (with power
> allocated thusly) suffers a wire short. If we chose option 2, we encompass a
> wider range of PD designs, including some very low cost options. But it
> limits the ability to integrate multiple channels down the road. 
> As an IC designer, I naturally favor option 1 - I'd like to sell PSE chips 
> with many integrated channels. As an engineer, I'm willing to weigh the pros
> and cons of each (including ones I haven't thought of yet) and vote for the
> best solution. Let's continue to air out the pros and cons until Don's vote -
> coming soon, right, Don? 
> Dave