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RE: PSE vs. PD power dissipation again

Good summary Dave,
See some comments bellow.

> -----Original Message-----
> From:	Dave Dwelley [SMTP:ddwelley@xxxxxxxxxx]
> Sent:	ו, מרץ 23, 2001 3:46 AM
> To:	stds-802-3-pwrviamdi@xxxxxxxx
> Subject:	RE: PSE vs. PD power dissipation again 
> At the risk of repeating some of this discussion, let me summarize the 
> PSE-PD dissipation issue as I see it. If I've made a mistake in any of the
> following points, please correct me!
> We seem to be split into two camps:
> Inrush limit by PD:
> - No dissipation in PSE, which means we can integrate multiple switches
> - Requires inrush circuit in PD = more $$ in PD (amount of $ subject to
> debate)
	[Yair Darshan]  Requires additional hardware to handle dynamic
changes in current.
	                        Requires additional hardware to implement
two level current limit to support PD's that their operating current >
Inrush current threshold
> - Puts power dissipation in PD FET always = bigger PD FET
> - Requires rapid overcurrent disconnect in PSE
> - A PSE with this design cannot power up a PD with no inrush limit
> Inrush limit by PSE:
> - Requires big FETs in the PSE to survive 500mA/100ms wire short
	[Yair Darshan]  The time can reduce down to 50mSec. for 470uF max.
	                        If we dont care about PD input charging
time, and we dont want to limit Capacitance, we can decrease this time even
> - Can power any PD - with or without inrush protection
	[Yair Darshan]  No inrush current limiting function is required in
> - Dissipation can be in PSE, PD, or shared
> - Must allow extended over-current faults before turn-off - adds to PSE 
> dissipation
	[Yair Darshan]  It is non repitable phenomena, statistically it is
average, and can be ignored thermally.
> - Can power big PD cap faster (500mA vs 350) if the PSE is sized to 
> dissipate the additional power
	[Yair Darshan]  No heatsink required for 500mA/100mSec max. with

> We need to endorse only one of these two, since they have mutually 
> exclusive features.
> Option 1 really only has one compelling feature, which is low watts in the
> PSE. We can integrate multiple option 1s in one chip. Multiple option 2s 
> can't be integrated without some accommodation - sequential turn on, 
> dynamically controlled current limit - something. There are secondary 
> benefits to option 1 - it won't power up non-inrush-controlled PDs, which 
> almost gets us the "second check" that Roger has been asking for, and it 
> won't put a heavy load on a power-managed PSE for long durations during a 
> wire short.
	[Yair Darshan]  Careful, PD with no inrush current limiting
connected to PSE with out inrush current limiting can cause accumulated
damaged by high current spikes. If PSE contains this function, the system is
always protected.

> Option 2 has some nice features, most notably the ability to power up 
> nearly any PD. It can also ride out a brief short on the wire without 
> disconnecting the PD.
	[Yair Darshan]  It can easily support PD with crazy dynamic load and
any un-expected transient for known application, and future application.
>  A minor downside is that the PSE power supply must 
> absorb a fair-sized overload if a PD classified as a low power device
> (with 
> power allocated thusly) suffers a wire short. 
	[Yair Darshan]  Again, it is very low duty cycle phenomena,
Statistically averaged to low number over time. Power supply will need
	margins from other reasons. This margins can be utilized to support
the above. It is done normally in any system containing power supply.
	Power Over MDI technology can use the same powering concepts. 
> If we chose option 2, we 
> encompass a wider range of PD designs, including some very low cost 
> options. But it limits the ability to integrate multiple channels down the
> road.
	[Yair Darshan]  I thing if we realy wants to integrate them we can
with some provisions that help dissipate the heat for limited time.
	                        for normal operation both concepts are the

> As an IC designer, I naturally favor option 1 - I'd like to sell PSE chips
> with many integrated channels. 
	[Yair Darshan]  Sell chips to PD, More PD's than PSE's...More
opportunities for integration in PD's 
> As an engineer, I'm willing to weigh the 
> pros and cons of each (including ones I haven't thought of yet) and vote 
> for the best solution. Let's continue to air out the pros and cons until 
> Don's vote - coming soon, right, Don?
	[Yair Darshan]  Agree. Again, very good summary.
> Dave