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Re: Potential heating problem with standard patch Cat5 panels


Correction: A 0805 SMT resistor is 2 X 1.6 mm, which translates to 79 X
63 mils. 

If we assume that the effective convection/radiation area is only that
area (i.e., no conduction to the board nor to the traces) you have
.07/.005 or 14 watts/sq in. That would clearly burn up. Hence, you need
to take into account nearby conduction. If we allow .25 in. spacing per
device in an array and assume uniform conduction/radiation, we still get
.07/0625 or 1.1 watta/sq in. That translates to over 100 degrees C rise.
Still a problem.

Concerning my numbers, I did make a mistake that I only realized when
trying to rationalize your numbers. I forgot that my model was for a
pair, yielding twice the wattage. Thus, my calculation should have shown
a 19 degree C rise. Still not a problem.

Note. At 25 degree C a .1W/ generates  15 degree C temperature rise
while 1W/ gives a 100 degree C rise

Jack Andresen 
Yair Darshan wrote:
> What is the worst case of the two cases:
> Case 1: PC board trace with 0.07W/inch generating 12C rise
> Case 2: 0.07W dissipated on 0805 SMT resistor rated to 125mW and its area is
> 8mils x 5 mils.
> I know that case  2 is being used without failure reporting. Since in case 2
> the power density/area is much higher than case 1, it seems that it is not a
> real problem.
> What others think about it?
> Yair.
> > -----Original Message-----
> > From: Jack Andresen [SMTP:jandresen@xxxxxxxxxx]
> > Sent: ה, מאי 03, 2001 11:21 PM
> > To:   stds-802-3-pwrviamdi@xxxxxxxx
> > Subject:      Potential heating problem with standard patch Cat5 panels
> >
> > A customer mentioned  panels burning up when one of his customers senr
> > power down the network.. I did some canculations and found a potential
> > problem.
> >
> > Jack Andresen << File: DTE power.doc >>