RE: insuring the stability of power delivery
See my comments below.
> -----Original Message-----
> From: Dave Dwelley [SMTP:ddwelley@xxxxxxxxxx]
> Sent: ה, מאי 31, 2001 11:52 PM
> To: Lynch, Brian; 'Yair Darshan'; 'Rick Brooks';
> Subject: RE: insuring the stability of power delivery
> This is a new wrinkle! I'm not a distributed power supply designer, but
> I'll take a stab at this anyway. Shout me down if I don't know what I'm
> talking about.
> At 11:02 AM 5/31/2001 -0400, Lynch, Brian wrote:
> >In our work with power systems, we have found that to insure
> >stability of a system, the closed loop output impedance of the
> >sourcing supply must be lower than the closed loop input impedance
> >if the load power supply over the frequency band and voltages
> >of interest. This concept is also discussed and taught at various
> >universities. VPI and MIT are two I have direct knowledge of.
> I see this as two problems - startup and steady state.
> In startup, the output impedance of the PSE power supply is what it is,
> the input impedance of the PD appears in series with whatever is doing the
> inrush limiting, be it in the PSE or the PD. The PSE power supply isn't
> likely to oscillate in this case. The line voltage is another matter -
> presumably if the limiter was in the PSE, the line voltage could oscillate
> (by Brian's theory);
[Yair Darshan] I do not agree to this assumption. If the limiter is
in the PSE, the PD input voltage can go to zero for some time and then ramp
This is not an oscillation it is a normal short circuit condition
when a voltage source is applied to a discharged capacitor.
With other simple implementation of the isolating switch, you
prevent this condition. In any case this condition is not a problem.
The case I present here was tested and confirmed in lab and also
with simulations. I think (and we need to check with Brian) that he had
implementation problem and not a conceptual problem.
> if it was in the PD, the line would stay quiet, but
> the node inside the PD between the inrush-limiting pass device and the
> input of the PD supply could oscillate. The PD designer can beat this by
> holding the switcher inactive until the input cap has reached its final
> value, or by balancing impedances properly.
[Yair Darshan] Again, in my opinion you are discussing a problem
that is not exist. Can any body send a detailed circuit showing a problem ?
> By this logic, if we force inrush limit into the PD, the spec can mostly
> avoid this issue (at least in startup). If we allow inrush in the PSE, we
> would have to define the nature of the PSE Zout and the PD Zin at startup.
> Once startup is complete, all inrush circuits are turned on hard, and
> loops go open - they won't oscillate anymore. Now the issue is between the
> Zout of the PSE supply and the Zin of the PD supply. I'd argue that the
> various pass devices (and the wire, if it's present) will ensure that the
> PD impedance (as seen by the PSE power supply) is reasonably high in all
> cases. The PSE power supply must have a low closed loop output impedance
> (DC and AC), with the actual value dependant on the number of ports it
> might need to power simultaneously. With a wide PSE (64+ ports?), that
> could still be a challenge.
> The spec can't avoid the issue here - I suspect we'd need to spec the
> maximum effective impedance over frequency at the PSE port (= the actual
> Zout multiplied by the number of simultaneous powerable ports), and the
> minimum impedance looking into the PD jack.
> In this analysis, I'm taking Brian's assertion about impedances at face
> value - I need to check this assumption before we follow this logic too
> Dave Dwelley
> Linear Technology