Thread Links Date Links
Thread Prev Thread Next Thread Index Date Prev Date Next Date Index

[802.3af] Contradiction in Table 33-5




I have seen two behaviours in PSEs, both of which I believe fall into the
OK category, and both of which at first pass were explained to me as being
the "proper" behaviour while the other behaviour was "non-standard."  This
revolves around short circuit behaviour.

1) When the PSE is in the power on steady state and experiences a short
circuit, it goes into current limiting mode limiting its output to about
400mA while voltage plummets and shuts off after about 50ms.  It is claimed
that item 10 in table 33-5 requires current limiting.
2) When the PSE is in the power on steady state and experiences a short
circuit, it ratchets up the current then nearly immediately shuts off after
output passes about 500mA (no current limiting, no delay is shut off.)  It
is claimed that item 1 in table 33-5 requires the PSE to maintain the
voltage until the PSE operates outside the spec and then shuts off.

It seems to me that both of the designers have reason to point to the spec
and claim they are doing the right thing, and point to part of the spec and
claim the other guy is doing bad.  I personally believe that either
behaviour is acceptable, and I expected to be allowed to choose either as
an implementation decision, what I think its bad is that both designers
claim to be "right" and say the other designer was "wrong."

I'll be putting in a comment about this, maybe we can mull it over before
next week?

Mike