Memory - Core Test Language (CTL)






Active Working Group Members:
Saman Adham (Co-Chair), Rohit Kapur (Co-Chair), Gary Waggoner, Karen Darbinyon, Slimane Boutobza, Rajat Mehrotra, Tim Ayres, Prashant Dubey, Albert Au, Vidya Neerkundar, Geir Eide

Public Information


IEEE Approved PAR for Memory CTL (1450.6.2)


E-Mail List
Extended Team
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MemoryCTL
Calender of Events

Next Face to Face Meeting : TBD


(Conference Call Meetings when needed)
Date Location Purpose/Agenda Docs
Wed. March 21, 2012 (8:00am PDT) Call-in Working Meeting Agenda Docs for Meeting and Actions List



CTL Documents
Presentations Examples Working Documents Minutes Attendance Records





SubGroups Documents
Pin Level Functions Memory Level General Memory Level Access Data and Address Mapping Redundancy Documentation Team


Memory Core Test Language Page is Maintained by
 Saman Adham, (613-591-5904) (saman@ieee.org)
Rohit Kapur, Synopsys Inc. (650-584-1487) (rkapur@synopsys.com)
Last modified: April 30, 2009