WELCOME TO THE

HARDWARE INTERFACES SUB-COMMITTEE

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IEEE-1505 Receiver-Fixture Interface (RFI)

IEEE-1505.1 Common Test Interface (CTI) Pin Map

IEEE-P1505.3 Downsize Pin Map

IEEE-P1693 MIPSS

Standards Efforts


IEEE SCC-20 Hardware Interfaces Sub-committee

Welcome to the Hardware Interfaces Sub-committee Home Page

 

The Hardware Interfaces (HI) Sub-committee manages the IEEE-1505 RFI and the associated Pin Map (IEEE-1505.1 CTI) standards.New developments in the world of test and sustainment support are blurring the lines between On-platform test and Off-platform test functions.HI is focused on facilitating the hardware interfaces of both those test functions within the scope of the Standards Coordinating Committee 20 (SCC20).If you are interested in the objectives and work of the Hardware Interfaces Sub-committee, contact us now or join SCC-20 by filling out a contact sheet known as the [Bluesheet].

 

 


General Documents of the Hardware Interfaces Sub-committee

 

 

RFI and 1505.1 Pin Map Overview

 

Related Standards, Links and Documents

1505.1 Pin Map in XML format [ZIP]

 

 

The CIWG Report that started it all

 

TC-8 MIPSS Presentation

 

 

DoDís Common Test Interface Presentation

Official Documents of Hardware Interfaces

 

Downsize Pin Map (Proposal for P1505.3)

Operations Manual

 

M-Module directory on C&H site to support Mezzanines of MIPSS

IEEE-P1505 PAR

 

All HIWG Minutes

 

IEEE-P1505.3 PAR

 

 

 

 

 

 

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This page was last modified on June 10, 2014 by Dave Droste