From: Carl Barnhart
Sent: Friday, January 22, 2010 2:21 PM
Subject: 1149.1 INIT Meeting Notes,
22 Jan 2010
We resumed the discussion of Initialization modal behavior:
- Carol discussed her modified slides and her current
proposal that requires any initialization results to persist across a TLR
state, but does allow the electrical parameters as well as the data on the
I/Os to revert to the value controlled by the “non-test” registers during
TLR (and presumably, other non-pin-controlling instructions.)
- Ken discussed his modified modal diagram (further
changes were made during the meeting that brought his proposals into
alignment with Carol’s. In particular, his “RESTORE” instruction is
now shown as a private instruction, and discussion of how to return from
“test-ready” to a mission mode will be included in the Standard as
discussion, not normative material.
- There was general agreement on the above ideas.
Also: the state of the chip after Power-up is to be referred to as a
non-test state, since it could be anything from a lobotomized “safe” state
to a fully functional ready state, and the 1149.1 Standard doesn’t care.
Ensuring that all “non-test” states are safe in the board environment
remains as it was before: the responsibility of the chip and board
It was decided that the discussion was at the point that Carol
could attempt modifying the rules to reflect this agreement and that we would
review those changes at the next meeting. Ken has distributed his updated
C.J. has requested a status for his meeting on the 26th.
We agreed that we have the rules at about 85%, discussion text at 10% (Carol’s
and Ken’s material), and actual incorporation into the dot-1 text at 0%.
Any changes or corrections to me, please.
"The secret is to ask the right question. Then the
answer takes care of itself."
Carl F. Barnhart
Senior DFT Architect / SiliconAid Solutions
Office: 512-535-1543 / Cell: 512-608-3280