Here are some results from the measurements we have done on the ĎMEI-chipí. The sections are partially taken of an internal report that is being made at the moment.

Basically we are looking for usefulness of the implementation for tests we have in mind in the consumer area. Some of the measurements really look promising, especially for the high-end audio test range. One can imagine that functionality in the video area is slightly less helped (so far).

Anyhow encouraging....


We measured the frequency response (amongst others) for switch S1, the core disconnect switch and for the AT test loop: switch E5-S4-S5-E6.

This is done for the four different impedance values that can be controlled through pins RA and RB.

Following results for -3dB point( DC offset is 1.5 V):
S1: 133mVtt 1,3vtt
/ra./rb 320kHz  260kHz
ra./rb 500kHz 500kHz
/ra.rb 1.8mhz 1.8mhz
ra.ra 5MHZ 5MHz
AT bus loop:
/ra./rb 65kHz (same for small and large signal)
ra./rb 130kHz  
/ra.rb 500kHz  
ra.rb 1.8mhz  


The following figures show some of the impedance measurements we have done. The non linearity is of course a source for signal distortion. For testing purposes this needs not to be a problem, as long as accurate measurements are not required in dynamic systems. For the core-disconnect switch, it will have an impact on the functional signal path. This may be intolerable in certain cases.

Small and large signal behaviour have been looked at and showed similar results as given in the paper work that accompanied this chip.

Several resistors are placed in series to influence the current flow. The nonlinear curves are clear from this first diagram.

This second diagram as well as the third one show the impedance variation for switch S1, with different RA and RB settings.


To measure the distortion introduced by the MEI-chip the distortion measurement set HP 339A was used. This set contains both the distortion analyser and an oscillator. This oscillator has a distortion level of -95dB in the range it was used. The first measurements are aimed at switch S1. Since switch S1 core-disconnect passes through the signal from core to pin in normal IC condition it should introduce as less distortion as possible.

The first measurements are performed with the internal oscillator without a DC-offset.

Figure 5.14 shows the set used to measure the distortion

Figure 5.14 measurement set.
Figure 5.15 shows the distortion in % without using an DC-offset.

figure 5.15 distortion measurement without using a DC-offset.
As mentioned before switch S1 is the most important switch, because we donít want to introduce distortion on the signals from normal IC-function. Figure 5.18 shows the introduced distortion when a DC offset is applied.

Figure 5.18 distortion core-disconnect.
When the lowest impedance value is being used , the smallest distortion is introduced.

The high impedance value causes more distortion.


The cross talk measurement, especially in the AT test loop was an interesting detail. The values for different frequencies is given in the diagram below.

So far for this moment. Thanks for the opportunity to MEI and the p1149.4 working group.

F. de Jong
Philips ED&T