October 6, 2014 Syntax Document

1. Overview
1.1 Scope
1.2 Purpose
2. Normative references
3. Definitions
4. Preface
4.1 Word Usage
4.2 Conventions
4.3 Semantics
5. Tutorial
5.1 Simple Test Program
5.2 Basic Test Program
5.3 Production Test Program
6. Language Description
6.1 STIL Statement
6.2 Comments
6.3 Token Length
6.4 Identifiers and Reserved Words
6.5 Device to Tester Interface
6.5.1 Signal Map
6.5.1.1 Signal Map Syntax
6.5.1.2 Signal Map Examples
6.5.2 Device
6.5.2.1 Chip
6.5.2.2 Package
6.5.2.3 Channel Map
6.5.2.4 Device Block Usage Examples
6.5.3 DCSequence
6.5.4 Wafer Map
6.5.5 Prober/Handler Interface
6.5.6 Multi-site/MPW Testing
6.6 Test Program
6.6.1 Entry Points
6.6.2 FlowVariables
6.6.3 Bin Map
6.6.4 Capture Memory and Analysis
6.7 Flow
6.7.1 Conceptual Model
6.7.2 Flow Related Types
6.7.2.1 TestBase
6.7.2.2 TestType
6.7.2.3 FlowType
6.7.2.4 FlowNode
6.7.3 Actions and Flow Control
6.7.4 Inheritance
6.7.5 Instantiation and Execution
6.7.6 Literal Values
6.7.7 Expressions
6.7.8 Variable Access
6.7.9 Variable and Parameter Types
6.7.9.1 Large Data Structure Parameter Types
6.7.9.2 Integral and Small Structure Variable and Parameter Types
6.7.9.3 Variable and Parameter Attributes
6.7.10 Operators and Member Functions
6.7.11 Mathematical Expressions
6.7.12 Boolean Expressions
6.7.13 String Expressions
6.7.14 Signal Expressions
6.7.15 Scalar Variable Initialization and Assignment
6.7.16 Scalar Parameter Initialization and Assignment
6.7.17 Array Variable Initialization and Assignment
6.7.18 Array Parameter Initialization and Assignment
6.7.19 Array Operations
6.8 Global Functions
6.9 Binning
6.9.1 Binning Element References
6.9.2 Soft Bin Definitions
6.9.3 Hard Bin Definitions
6.9.4 Bin Groups
6.9.5 Bin Axes
6.9.6 Bins
6.9.7 Bin None
6.9.8 Bin Maps
6.9.9 Counters
6.9.10 Retest
6.10 Standard Definitions
6.10.1 Standard Enumerated Types
6.10.2 Standard Global Variables
6.10.3 Standard Default Flow-node
6.10.4 Standard TestBase
6.10.5 Standard No-op and None
6.10.6 Standard PatternExec Test
6.10.7 Standard Functional Test
6.10.8 Standard Flow
6.11 Interaction with Other IEEE 1450 Extensions
6.11.1 Unnamed Top-Level Blocks
6.11.2 STIL.0: Digital Test Vector Data and Timing
6.11.2.1 Syntax and Semantics
6.11.2.2 Functions and UserFunctions
6.11.2.3 Signals
6.11.2.4 Signal Groups
6.11.2.5 Timing, DCLevels, DCSequence, and Pattern Related Extensions
6.11.2.6 Spec/Category Variables
6.11.2.7 PatternBurst
6.11.2.8 PatternExec
6.11.2.9 Include Statement Syntax
6.11.3 STIL.1: Semiconductor Design Environments
6.11.3.1 PatternBurst
6.11.3.2 Shared Global Variable Memory
6.11.4 STIL.2: D.C. Levels
6.11.5 STIL.3: Tester Target Specification
6.12 Input File Organization
Annex A Recommendations
A.1 Portability/Retargeting
A.1.1 Device to Tester Interface
A.1.2 Usage of Standard and User-defined Tests
A.1.3 Standard Global Variables
Annex B Name Spaces
Annex C Scoping and Name Resolution Rules
C.1 Global and TestProgram Flow Variables
C.2 Test Variables and Parameters
C.3 Signals and Signal Groups
Annex D Event Sequence
D.1 Parsing and Loading
D.2 Execution
Annex E Backus-Naur Forms
E.1 STIL Statement
E.2 Input File Organization
E.3 Variables and Expressions
E.3.1 Identifiers
E.3.2 Literal Values
E.3.2.1 Integers and Booleans
E.3.2.2 Real numbers and Numbers with Units
E.3.2.3 Enumerated Types
E.3.2.4 Strings
E.3.2.5 Vector Location
E.3.3 Expressions
E.3.3.1 Mathematical
E.3.3.2 Limits
E.3.3.3 Boolean
E.3.3.4 String
E.3.4 Variable and Parameter Attributes
E.3.5 Variable and Parameter Types
E.3.6 Arrays
E.3.7 Mathematical Expressions
E.3.8 Boolean Expressions
E.3.9 String Expressions
E.4 Flow
E.4.1 Function Definition
E.4.2 Type Definition
E.4.2.1 TestBase
E.4.2.2 FlowNode
E.4.2.3 TestType
E.4.2.4 FlowType
E.4.3 Type Instantiation
E.4.3.1 FlowNode
E.4.3.2 TestType
E.4.3.3 FlowType
Annex F Bibliography
Annex G Top Level Block Sequence
G.1 Skeleton and Dependencies
G.2 Complete Test Program
Annex H Adaptive Testing