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IEEE std 1500 - Standard for Embedded Core Test
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IEEE Std 1500 is a scalable standard architecture for enabling test reuse and integration for embedded cores
and associated circuitry. It foregoes addressing analog circuits and focuses on facilitating efficient test of
digital aspects of systems on chip (SoCs). IEEE Std 1500 has serial and parallel test access mechanisms
(TAMs) and a rich set of instructions suitable for testing cores, SoC interconnect, and circuitry. In addition,
IEEE Std 1500 defines features that enable core isolation and protection. IEEE Std 1500 will reduce test cost
through improved automation, promote good design-for-test (DFT) technique, and improve test quality
through improved access.
Core test language (CTL) is the official mechanism for describing IEEE 1500 wrappers and test data associated
with cores. CTL is defined in IEEE P1450.6™ and was originally begun as part of the development of
IEEE Std 1500.
IEEE Std 1500 was broadly influenced by the past work of the IEEE Std 1149.1™ Working Group and has
several members from that group. IEEE Std 1149.1 and IEEE Std 1500 have similar goals at different levels
of integration. IEEE Std 1149.1 describes a wrapper architecture and access mechanism designed for the
purpose of testing components of a board whereas IEEE Std 1500 has a similar structure targeted towards
testing cores in an SoC.
IEEE Std 1500 has been a continuous effort for its participants due to the goal of resolving the needs of reconciling
and accommodating disparate test strategies and motives. The greatest effort has been put into supporting
as many requirements as possible while still producing a cohesive and consistent standard.
Approved 30 June 2005
American National Standards Institute
Approved 20 March 2005
IEEE-SA Standards Board
Sponsor
Test Technology Technical Council
of the
IEEE Computer Society
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IEEE std 1500 Chair
