Re: Interval hardware and existing practice
Ralph Baker Kearfott wrote:
> Nate et al,
>
> See my inserted comment.
>
> Baker
>
> Nate Hayes wrote:
>> Dan Zuras Intervals wrote:
>>>> Date: Mon, 7 Sep 2009 14:50:05 -0400
>>>> From: Nate Hayes <nh@xxxxxxxxxxxxxxxxx>
>>>> Subject: Re: Branch & bound for not everywhere defiend constraints
>>>> To: STDS-1788@xxxxxxxxxxxxxxxxx
>>>>
>>>> Dan Zuras Intervals wrote:
> .
> .
> .
>>
>> I just want to see blazing fast interval hardware. Soon. If we make
>> it easy for hardware vendors to retrofit intervals into existing
>> floating-point hardware, like the SSE registers or the Larrabee VPU,
>> I think it increases chances the hardware vendors will actually
>> provide interval support.
>
> I agree strongly that there are big advantages to designing
> the interval standard to fit into existing practice, where
> such design does not seriously compromise other attributes
> of the interval computation. I see this as particularly so
> with regard 754-2008-conforming machines. I am also glad you
> are considering trends in hardware.
In my view, the problem with decorated intervals is they don't appear to
provide any benefit or function that can't be achieved more simply and
efficiently with a few standardized NaIs, which would retrofit very nicely
into existing hardware.
I think those in favour of decorated intervals need to show why they are
absolutely necessary; even if this can be done, it should also be explained
why we CAN'T also have NaIs for the branch-and-bound algorithms.
Nate