Re: Motion P1788/M0008.01_Exception_Handling
Michel Hack wrote:
> John also asked how parallel hardware could handle decorations
> and numerics at the same time. There is a precedent for this
> in several SIMD architectures. One that I am familiar with is
> the 20-year-old S/370 Vector Facility (now obsolete), which
> consisted of vector arrays (512 elements) and corresponding
> bit vectors (the Vector Mask Register). Operations would set
> bits corresponding to the vector index of a result element,
> and could control whether and how vector elements participated
> in an operation (depending on the operation code).
Intel's Larrabee appears to revive this trend. In addition to the 16-element
Vector Processing Unit, there is also a 16-bit mask register. Most
operations on elements in the VPU can be predicated on the status of the
corresponding bit in the 16-bit mask register. For example, only elements in
the VPU with corresponding bit set in the mask register might be moved for a
vectorized move operation, etc.
However, I hope its not lost in this dicsussion that the scenario John
describes involving both intervals and decorations is only one of three
possible cases facilitated by motion 8. John originally labelled these cases
B1, B2 and B3 in some recent post, but I re-introduce them here again as C1,
C2, and C3:
C1: The user is entirely uninterested in decorations and only wants to
perform exception-free arithmetic on bare intervals
C2: The user is entirely uninterested in decorations unless an exception
occurs, in which case he then *only* cares about the decoration and the
interval is completely useless
C3: The user is interested in the decoration and the interval,
regardless if an exception does or does not occur
In C1, only exception-free interval arithmetic (as presented in Motion 5,
for example) is necessary. No snags exist, since no decorations are used or
involved at all. There are no snags with C2, either, assuming that bare
decorations can be written into the memory locations of bare intervals (this
is functionally equivalent to the many NaI idea). Only in C3 do the possible
snags John outlines become an issue.
The difference betwen C1 and C2 is reminiscent of the "two opcodes" idea,
since C1 employs forgetful operators that throw away decorations and C2
employs forgetful operators that throw away intervals (when an exception
occurs).
Its also worth noting the C++ expression template paper by Marco Nehmeier
and Prof. Gudenberg essentially provides an implementation mechanism for C1
(Interval) and C3 (ExpressionResult). By extending this C++ implementation
to suport a third option for C2 (possibly named ExceptionInterval or
something along these lines), it would then be conforming to the principles
of Motion 8.
Nate Hayes