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RE: SONET/Ethernet clock tolerance

Title: RE: SONET/Ethernet clock tolerance


You refer to an evaluation of power estimate savings if the pointer & OH functionality
list from Tim's e-mail was not included in your example. Where are the results of that
evaluation? What portion of the 55% for pointer & OH and the 45% clock tree power
consumption is eliminated? Also, what portion of the I/O would be eliminated?
Note further that you are referring to an OC-48 design, the savings will be even larger
at OC-192 rate because several of the eliminated functions scale in complexity with line rate.


David W. Martin
Nortel Networks
+1 613 765-2901  
+1 613 763-2388 (fax)