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RE: SONET/Ethernet clock tolerance

Title: RE: SONET/Ethernet clock tolerance


Thanks for clarifying what you're after. We'll provide a gate count estimate for:

  1. Our WAN-compatible PHY proposal
  2. A fully SONET-compliant OC-192c Section/Line/Path function (1 path)
  3. A fully SONET-compliant OC-192 Section/Line/Path function (192 paths)

where a gate is defined as a 2-input NAND and the internal processing pipeline
is 32-bits at 311M. If you could please generate a gate count estimate for your
XGENIE proposal then we'll have some numbers to compare. Thanks.


David W. Martin
Nortel Networks
+1 613 765-2901  
+1 613 763-2388 (fax)